Design Of A Low Voltage,Low Drop-Out (Ldo) Voltage Cmos Regulator
نویسندگان
چکیده
منابع مشابه
High PSRR Low Drop-out Voltage Regulator (LDO)
In order to solve the stability problems and increase the PSRR performance of the Low Drop-out Voltage (LDO) a novel technique is presented. The main purpose of this work was to obtain a high PSRR, high power efficiency with a low load current. To achieve this, several techniques such as Nested Miller Compensation (NMC), Pole-Zero Tracking Frequency Compensation (PZTFC) and Single Miller Compen...
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This paper describes the Designing of Low Power LOW DROP-OUT (LDO) Voltage Regulator using Bulk Modulation technique. Low-Drop-Out (LDO) voltage regulators are commonly used in electronic systems particularly in portable or low-power applications. Their main function is to provide a stable supply voltage by minimizing the ripples and noises caused by imperfect power sources and/or variable load...
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A 1.21V output, 100mA, 0.1μF-10μF output capacitor, ESR-independent, low voltage, low drop-out voltage regulator for portable power applications is designed and fabricated in a 0.5μm CMOS process with an area of 0.22 mm. The use of a wide-range output capacitor LDO enables reduced target system PCB size and Bill of Materials (BOM). A 0.05%/V line regulation, 0.001%/mA load regulation with 220mV...
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ژورنال
عنوان ژورنال: IOSR Journal of Electronics and Communication Engineering
سال: 2012
ISSN: 2278-8735,2278-2834
DOI: 10.9790/2834-0164045